Mr. Xingjie Xu | Engineering | Best Researcher Award

Student/Member, Zhejiang University, China

Xingjie Xu is an accomplished graduate student from Zhejiang University, where he has been honored with titles such as “Outstanding Graduate Student” and “Outstanding Graduate.” With a master’s degree from Zhejiang University, Xingjie focuses his research on Readout Circuit Design for RRAM Array-based Computing in Memory Architecture. He has made significant contributions to his field, including publishing articles in esteemed journals and actively participating in innovative research projects.

Profile

ORCID

 

Education

Xingjie Xu earned his master’s degree from Zhejiang University. His academic journey is marked by his achievements as an “Outstanding Graduate Student” and “Outstanding Graduate” at Zhejiang University, where he has excelled in his research and academic pursuits.

Experience

Xingjie Xu’s experience encompasses notable research in the field of in-memory computing. He has designed low-power and small-area SAR ADCs for in-memory computing and developed current-controlled oscillator-type readout circuits. His hands-on experience in these projects highlights his expertise and dedication to advancing technology in his area of focus.

Research Interests

Xingjie Xu’s research interests lie in Readout Circuit Design for RRAM Array-based Computing in Memory Architecture. He is particularly focused on developing efficient, low-power, and small-area designs for in-memory computing applications, contributing to the advancement of modern computing architectures.

Awards

Xingjie Xu has received several prestigious awards, including the title of “Outstanding Graduate Student of Zhejiang University” and “Outstanding Graduate of Zhejiang University.” These accolades recognize his exceptional academic performance and contributions to research.

Publications

A 0.0025mm² 8-bit 70MS/s SAR ADC with a Linearity-Improved Bootstrapped Switch for Computation in Memory

Readout Circuit Design for RRAM Array-Based Computing in Memory Architecture