Mr. Angelos Athanasiadis | Hardware Acceleration | Research Excellence Award

Aristotle University of Thessaloniki | Greece

Mr. Angelos Athanasiadis is a researcher in Electrical and Computer Engineering whose work centers on high-performance FPGA architectures, hardware acceleration of Convolutional Neural Networks, and advanced emulation methodologies for heterogeneous computing systems. His research focuses on enabling full-precision, non-quantized deep learning inference on reconfigurable hardware, addressing challenges in energy efficiency, throughput optimization, and deployment in accuracy-critical environments such as aerial monitoring, autonomous systems, and embedded intelligence. He has contributed to the development of parameterizable high-level synthesis (HLS) IP libraries and FPGA-optimized computational kernels, including a fully customizable matrix multiplication framework that supports architectural exploration, resource scalability, and integration with modern AMD FPGA toolchains. Beyond acceleration frameworks, he has designed FUSION, an innovative open-source emulation platform that synchronizes QEMU and OMNeT++ using HLA/CERTI to achieve deterministic, timing-accurate, multi-node experimentation with sub-microsecond synchronization and complete observability of system-level interactions. His work expands the boundaries of distributed embedded system prototyping by combining CPUs, GPUs, and FPGAs into unified hybrid simulation environments. He has participated in collaborative research projects and contributed to publications in embedded systems, power/timing modeling, and FPGA computing. His citation record reflects an emerging academic profile, with metrics documented through Google Scholar and Scopus, including citation counts, h-index values, and related research indicators. Supporting documents, citations, and publication evidence can be verified through his academic profiles as required. His research continues to advance the intersection of hardware design, machine learning acceleration, and distributed system emulation, contributing tools and methods that strengthen reproducibility, scalability, and efficiency in modern computing research.

Publication Profile

ORCID | Google Scholar

Featured Publications 

Athanasiadis, A., Tampouratzis, N., & Papaefstathiou, I. (2025). An efficient open-source design and implementation framework for non-quantized CNNs on FPGAs. Integration, 102625. (Citations: 1)

Athanasiadis, A., Tampouratzis, N., & Papaefstathiou, I. (2025). Energy-efficient FPGA framework for non-quantized convolutional neural networks. arXiv:2510.13362. (Citations: 1)

Athanasiadis, A., Tampouratzis, N., & Papaefstathiou, I. (2024). An open-source HLS fully parameterizable matrix multiplication library for AMD FPGAs. WiPiEC Journal-Works in Progress in Embedded Computing, 10(2). (Citations: 2)

Katselas, L., Jiao, H., Athanasiadis, A., Papameletis, C., Hatzopoulos, A., & colleagues. (2017). Embedded toggle generator to control the switching activity during test of digital 2D-SoCs and 3D-SICs. Proceedings of the International Symposium on Power and Timing Modeling, Optimization. (Citations: 2)

Katselas, L., Athanasiadis, A., Hatzopoulos, A., Jiao, H., Papameletis, C., & colleagues. (2017). Embedded toggle generator to control the switching activity. Conference publication. (Citations: 2)